³Ô¹Ïtv,HDI PCB Manufacturing Capabilities,2026.09.17-capabilities-r3
Scope,Process references; confirm the combined construction and acceptance plan.
Page,/hdi-pcb-capability/

HDI build-up & microvia construction
Parameter,Specification,Application notes
HDI structures,"1+N+1, 2+N+2, 3+N+3, 4+N+4; any-layer / ELIC by construction review",
Laser microvia diameter,0.10 mm reference; 0.075 mm advanced — review depth and fill,
Microvia capture pad,from ~0.25 mm,
Microvia types,"Stacked, staggered & skip vias",
Via fill,"Copper-filled & stacked · resin-filled, capped & planarized (via-in-pad / VIPPO)",
Build-up,Sequential lamination · multiple build-up layers,
Min. blind / buried via,0.1 mm (within 1–18 layers),"Define layer span, depth and opening diameter; confirm the complete via map."
Aspect ratio,Through-hole up to ~10:1,Through-hole only; specify laser microvia depth/opening separately.
Conditions,"Define top/bottom laser opening, dielectric depth, capture pad and fill. The through-hole aspect ratio is not a microvia aspect ratio."

"Conductors, drilling & plating"
Parameter,Mass production,Prototype / extended review,Application notes
Min. inner-layer clearance,3 mil,3 mil,
Min. line width,3 mil (0.0762 mm),3 mil (0.0762 mm),Earlier HDI reference: 0.075 mm. 3 mil equals 0.0762 mm; state the intended drawing unit.
Min. line space,3 mil (0.0762 mm),3 mil (0.0762 mm),Earlier HDI reference: 0.075 mm. 3 mil equals 0.0762 mm; state the intended drawing unit.
Min. mechanical hole,0.15 mm HDI reference,0.10 mm host-platform option — HDI review required,"Confirm drilling vs finished diameter, hole depth and material."
Min. plated hole copper,25 µm,25 µm,Plated-through-hole reference; specify average/local minimum and acceptance class.
PTH dia. tolerance,±0.076 mm (≈±3 mil),±0.076 mm (≈±3 mil),
NPTH dia. tolerance,±0.05 mm (≈±2 mil),±0.05 mm (≈±2 mil),
Hole position deviation,±0.05 mm (≈±2 mil),±0.05 mm (≈±2 mil),
Conditions,Mechanical drilling and finished-hole measurements are different. The plated-through-hole copper entry must not be treated as a laser-fill requirement.

"Host-board layers, copper & marking"
Parameter,Mass production,Prototype / extended review,Application notes
Host-board platform layers,1–24 layers,1–78 layers,"1–24 / 1–78 are platform windows, not HDI qualification. Earlier HDI-specific range: 4–32, 56 advanced. Confirm via architecture."
Host-board copper envelope,4 oz (nominal ≈140 µm),up to 12 oz,HDI-specific finished copper reference: 18–70 µm. Heavier host-board copper needs a separate combined-structure review.
Min. solder-mask bridge,0.1 mm (≈4 mil),0.1 mm (≈4 mil),
Solder-mask colour,"Green, Black, Blue, White, Yellow, Red","Green, Black, Blue, White, Yellow, Red",
Silkscreen colour,"White, Yellow, Red, Black","White, Yellow, Red, Black",
Conditions,"The host-board envelope is not a qualification for every HDI combination. ³Ô¹Ïtv’s earlier HDI table listed 4–32 layers, with 56 layers advanced, and finished copper of 18–70 µm. Higher layers or heavier copper require a specific HDI review."

Profile & mechanical processing
Parameter,Mass production,Prototype / extended review
Outline method,"Routing, V-groove, beveling, punch","Routing, V-groove, beveling, punch"
Outline tolerance,±0.15 mm (≈±6 mil),±0.15 mm (≈±6 mil)
Peelable mask,"Top, bottom, double-sided","Top, bottom, double-sided"
Conditions,"Dimension routed edges, score depth and fixtures. Keep critical vias and traces clear of the agreed fabrication edges."

Electrical & reliability requirements
Parameter,Mass production,Prototype / extended review,Application notes
Controlled impedance,±10%,±7%,"Agree signal/reference layers, geometry, coupon and test method."
Insulation resistance,1 × 10¹² Ω (normal),1 × 10¹² Ω (normal),"Confirm temperature, humidity, conditioning and test voltage."
Through-hole resistance,Per approved continuity test plan,Per approved continuity test plan,Continuity threshold and unit must be specified in the electrical-test plan.
Thermal shock,3 × 10 sec @ 288 ℃,3 × 10 sec @ 288 ℃,"Confirm specimen, conditioning, cycles and acceptance method; not an operating-temperature rating."
Warp & twist,≤ 0.7%,≤ 0.7%,Define the panel/board condition and measurement method.
Electric strength,> 1.3 kV/mm,> 1.4 kV/mm,Material test reference; confirm test method and dielectric construction.
Flammability,94V-0 material / construction option,94V-0 material / construction option,For the selected recognized material/construction; request the applicable UL file and thickness range.
Test voltage,50–330 V,50–330 V,Electrical-test setting; not rated operating voltage.
Conditions,"Specify reliability test vehicles, conditioning, sampling and acceptance before release. More build-up stages are not proof of greater reliability."