An Ethernet magnetics placement review should produce a drawing that another engineer can inspect, not merely a statement that the transformer is close to the connector. The important deliverable is a coordinated view of the media pairs, magnetic component, isolation boundary, copper restrictions and connector mechanics. A short route can still be wrong if its return environment changes abruptly, a mounting feature crosses a restricted region, or the chosen connector has a different internal circuit from the schematic symbol.
This review concentrates on a conventional transformer-isolated copper Ethernet port. It does not cover transformerless links or single-pair Ethernet as interchangeable variants. For the wider processor-to-cable architecture, use the industrial Ethernet layout review. Here, the practical output is a placement acceptance sheet: exact component identities, annotated layer views, deviations and the tests needed before releasing that particular port.
Build the placement review around the actual magnetic component
Collect the circuit identities before judging distances
Start with the PHY part number and revision, supported link modes, magnetic part number, connector drawing and enclosure interface. Add the actual circuit symbol and footprint revision to the same review sheet. A transformer ratio or pin count alone does not establish compatibility. The arrangement of center taps, common-mode chokes and terminations must agree with the selected PHY circuit. Mark each net from the PHY pin to the physical connector contact, including any internal connection hidden within a magjack.
Separate discrete magnetics from connectors with integrated magnetics. With discrete parts, the board exposes a cable-side route between the magnetic module and jack. In a magjack, much of that path may be internal, while the connector footprint introduces shield tabs and other terminals. Reusing the old keep-out drawing after switching between these constructions can leave obsolete restrictions in one place and omit necessary ones elsewhere. Review the new manufacturer’s drawing instead of scaling the old outline.
Write a component-change rule into the BOM notes. An alternative connector should trigger a circuit, footprint, mechanical and isolation review even when purchasing describes it as equivalent. A useful substitute record compares pin mapping, internal schematic, height, insertion direction, board retention and the referenced electrical ratings. This is particularly valuable when an apparently harmless supply-chain change occurs after the prototype has passed its first communication tests.
Use vendor guidance as a rule source, with boundaries
is supplementary to component data sheets. It discusses MDI routing, magnetic-region copper restrictions and nearby return vias. Its guidance distinguishes discrete magnetics from an integrated connector, and its Ethernet protection discussion places relevant ESD devices on the PHY side. Treat these as review prompts tied to the stated implementation; do not turn one drawing into an isolation or surge qualification for every product.
Create a small rule register with four columns: requirement, source revision, affected region and verification method. A CAD rule can check trace spacing, but a reviewer may still need to compare a chassis tab against the enclosure model. A manufacturer recommendation about placement belongs beside the part it applies to. Where two documents appear inconsistent, record the question and obtain an application-specific resolution before changing the copper. An undocumented compromise is difficult to reproduce during the next board revision.
Keep signal-integrity objectives separate from insulation requirements. Controlled differential geometry concerns electrical propagation through the routed structure. Isolation distances depend on the product construction and applicable requirements. Neither is established by the other. The controlled-impedance planning page can support a fabrication discussion, but an impedance result cannot approve an isolation barrier.
Inspect the entire geometry, including the parts that are not traces
Make three overlays: signal routing, all-layer copper and mechanical metal. The signal overlay shows paired routes and transitions. The copper overlay includes planes, pours, vias, pads and unused copper. The mechanical overlay includes connector shields, mounting holes, fasteners and nearby enclosure features. Review them together at the final placement, not at an early floorplan that no longer matches the release files.
At a boundary, ask where each field and disturbance-current path is intended to go. A routing reference should not disappear accidentally because a keep-out was drawn for a different region. Conversely, an unbroken plane should not be preserved automatically through a region that requires a copper restriction. Resolve this locally from the selected construction. Extending every keep-out under every route, or filling every empty area with ground, are both poor substitutes for a documented regional decision.
The placement drawing should also identify parts that can disturb the port: switching inductors, fast clocks and high-current connectors. The review question is not whether an arbitrary distance is universally safe. It is whether the nearest aggressor and its return path have been considered in the installed arrangement. If the enclosure forces a switcher close to the connector, label that as a validation condition rather than hiding it behind a generic layout checklist.
Choose a stackup before tuning the route
Use the approved dielectric heights, copper construction and reference layers when assigning routing geometry. Nominal overall board thickness does not describe the distance from an MDI trace to its reference plane. A design drawn on a four-layer PCB can have substantially different interconnect geometry after the fabrication stackup changes, even if the finished thickness stays the same.
If six layers are needed for power distribution, escape routing or regional reference control, discuss the six-layer construction before adjusting every trace width. Layer count is a resource decision, not an Ethernet speed rating. A stackup change should reopen the impedance and boundary checks; it should not automatically reopen unrelated connector dimensions that remain unchanged. This separation makes the review faster and more precise.
Turn placement observations into release evidence
A worked placement comparison
Consider an illustrative controller with a discrete transformer and a fixed panel opening. Layout A has a 22 mm PHY-side route with one balanced layer transition. Layout B has a 16 mm route but introduces a connector-shield feature into a region previously reserved for isolation. These lengths are assumed examples, not recommended limits. The six-millimeter reduction does not make B the preferred design until the shield feature and its boundary consequences are resolved.
Now suppose A includes an unnecessary tuning section that adds 8 mm to both conductors without correcting a documented requirement. Removing that section may simplify the route while preserving the approved placement. The appropriate action is to examine the actual constraints and electrical environment, not to move the transformer merely to win a total-length comparison. Record what changed and why, then regenerate the affected geometry reports.
A simple mismatch calculation can help prioritize review. If two routes differ by an assumed 0.6 mm and the modeled propagation delay is 6 ps/mm, their geometric delay difference is 3.6 ps. This arithmetic is only a screening estimate: it does not include package delay, different reference environments or discontinuities. It is not an Ethernet compliance limit. Its useful lesson is that a precise length report answers a narrower question than overall channel behavior.
| Observation | Useful evidence | Decision it supports |
|---|---|---|
| Shorter route with new shield feature | All-layer and enclosure overlay | Whether the proposed placement preserves the required boundary |
| Unequal paths within a pair | Constraint source and routed geometry | Whether correction is required, and where |
| Extra vias or test pads | Transition and loading review | Whether access justifies the discontinuity |
| Alternative magjack | Internal schematic and footprint comparison | Whether a new component is a valid substitute |
Separate a fabrication check from a functioning port
The bare board review can establish that the released geometry and net connectivity were manufactured as specified. It cannot establish the PHY configuration, transformer orientation, connector assembly or installed communication behavior. Use PCB manufacturing review to resolve stackup, copper restrictions and inspection notes. Use populated prototypes to answer the circuit and system questions that require components and firmware.
Before powered tests, check assembly orientation and part identity against the BOM. A rotated transformer or wrong connector variant can look like a signal-integrity problem. Confirm power, reset, clock and PHY configuration before treating an intermittent link as proof that the placement needs to move. Preserve the firmware build and strap configuration with each result so the electrical comparison remains meaningful.
For prototype validation, specify the link partner, cable, traffic condition, temperature condition and enclosure state. Include a cold start, sustained traffic and a defined disconnect/reconnect sequence. Record error counters and recovery behavior rather than only whether a link LED illuminates. The acceptance limits belong to the product requirements. These suggested observations do not replace formal interface, EMC or insulation testing.
Design test access without quietly changing the channel
A large test pad attached through a branch is not electrically invisible. Decide whether production needs that access, whether a fixture can reach an existing feature, and whether a populated-board measurement is intended to load the node. The PCB test-point design guide is useful for organizing access and fixture constraints; high-speed probing still needs an appropriate measurement method.
When requesting prototype board assembly, distinguish visual inspection, connectivity checks and functional traffic tests. State which fixtures and firmware will be supplied. If the magnetic component has hidden joints or an unusual termination style, identify the inspection concern rather than assuming every quotation includes a particular inspection method. The agreed scope should describe observable results, not simply say Ethernet tested.
A concise release packet
Release the schematic, component identities, stackup, routing constraints, mechanical drawing and annotated boundary views together. Add a one-page exception list with an owner and required evidence for each unresolved item. Mark whether the connector is discrete or contains magnetics, and identify any optional PoE circuitry as a separate controlled scope. Keep screenshots linked to the released CAD revision so they cannot be mistaken for an earlier successful prototype.
For a manufacturing question, provide board dimensions, quantity, layer count, the intended assembly scope and the specific placement uncertainty. A reviewer can respond more usefully to a marked shield-tab conflict than to a request to check all Ethernet details without files. Request a review of the board files and open placement questions. The diagrams and arithmetic here support that discussion; they are not a released layout or evidence of product qualification.