Stacked, staggered or skip vias
Choose the via span from the routing requirement, then review dielectric depth, pad registration, fill and the cumulative lamination sequence.
吃瓜tv / Manufacturing specifications
HDI PCB Manufacturing Capabilities
Compare HDI build-up structures, laser microvias, copper filling, fine-line geometry and the verification needed for the actual via stack.
- Build-up structures
- 1+N+1 鈫� ELIC
- Laser via reference
- 0.10 mm
- Advanced laser via 路 review
- 0.075 mm
- Published HDI copper range
- 18鈥�70 碌m
Full process capability tables
For the PCB manufacturing review, use the matching construction and production window. Dimensions, copper and via limits must be reviewed together; an extended capability is confirmed against the released drawing.
Capability tables (CSV)HDI build-up & microvia construction
| Parameter | Specification | Application notes |
|---|---|---|
| HDI structures | 1+N+1, 2+N+2, 3+N+3, 4+N+4; any-layer / ELIC by construction review | |
| Laser microvia diameter | 0.10 mm reference; 0.075 mm advanced 鈥� review depth and fill | |
| Microvia capture pad | from ~0.25 mm | |
| Microvia types | Stacked, staggered & skip vias | |
| Via fill | Copper-filled & stacked 路 resin-filled, capped & planarized (via-in-pad / VIPPO) | |
| Build-up | Sequential lamination 路 multiple build-up layers | |
| Min. blind / buried via | 0.1 mm (within 1鈥�18 layers) | Define layer span, depth and opening diameter; confirm the complete via map. |
| Aspect ratio | Through-hole up to ~10:1 | Through-hole only; specify laser microvia depth/opening separately. |
Define top/bottom laser opening, dielectric depth, capture pad and fill. The through-hole aspect ratio is not a microvia aspect ratio.
Conductors, drilling & plating
| Parameter | Mass production | Prototype / extended review | Application notes |
|---|---|---|---|
| Min. inner-layer clearance | 3 mil | 3 mil | |
| Min. line width | 3 mil (0.0762 mm) | 3 mil (0.0762 mm) | Earlier HDI reference: 0.075 mm. 3 mil equals 0.0762 mm; state the intended drawing unit. |
| Min. line space | 3 mil (0.0762 mm) | 3 mil (0.0762 mm) | Earlier HDI reference: 0.075 mm. 3 mil equals 0.0762 mm; state the intended drawing unit. |
| Min. mechanical hole | 0.15 mm HDI reference | 0.10 mm host-platform option 鈥� HDI review required | Confirm drilling vs finished diameter, hole depth and material. |
| Min. plated hole copper | 25 碌m | 25 碌m | Plated-through-hole reference; specify average/local minimum and acceptance class. |
| PTH dia. tolerance | 卤0.076 mm (鈮埪�3 mil) | 卤0.076 mm (鈮埪�3 mil) | |
| NPTH dia. tolerance | 卤0.05 mm (鈮埪�2 mil) | 卤0.05 mm (鈮埪�2 mil) | |
| Hole position deviation | 卤0.05 mm (鈮埪�2 mil) | 卤0.05 mm (鈮埪�2 mil) |
Mechanical drilling and finished-hole measurements are different. The plated-through-hole copper entry must not be treated as a laser-fill requirement.
Host-board layers, copper & marking
| Parameter | Mass production | Prototype / extended review | Application notes |
|---|---|---|---|
| Host-board platform layers | 1鈥�24 layers | 1鈥�78 layers | 1鈥�24 / 1鈥�78 are platform windows, not HDI qualification. Earlier HDI-specific range: 4鈥�32, 56 advanced. Confirm via architecture. |
| Host-board copper envelope | 4 oz (nominal 鈮�140 碌m) | up to 12 oz | HDI-specific finished copper reference: 18鈥�70 碌m. Heavier host-board copper needs a separate combined-structure review. |
| Min. solder-mask bridge | 0.1 mm (鈮�4 mil) | 0.1 mm (鈮�4 mil) | |
| Solder-mask colour | Green, Black, Blue, White, Yellow, Red | Green, Black, Blue, White, Yellow, Red | |
| Silkscreen colour | White, Yellow, Red, Black | White, Yellow, Red, Black |
The host-board envelope is not a qualification for every HDI combination. 吃瓜tv鈥檚 earlier HDI table listed 4鈥�32 layers, with 56 layers advanced, and finished copper of 18鈥�70 碌m. Higher layers or heavier copper require a specific HDI review.
Profile & mechanical processing
| Parameter | Mass production | Prototype / extended review |
|---|---|---|
| Outline method | Routing, V-groove, beveling, punch | Routing, V-groove, beveling, punch |
| Outline tolerance | 卤0.15 mm (鈮埪�6 mil) | 卤0.15 mm (鈮埪�6 mil) |
| Peelable mask | Top, bottom, double-sided | Top, bottom, double-sided |
Dimension routed edges, score depth and fixtures. Keep critical vias and traces clear of the agreed fabrication edges.
Electrical & reliability requirements
| Parameter | Mass production | Prototype / extended review | Application notes |
|---|---|---|---|
| Controlled impedance | 卤10% | 卤7% | Agree signal/reference layers, geometry, coupon and test method. |
| Insulation resistance | 1 脳 10鹿虏 惟 (normal) | 1 脳 10鹿虏 惟 (normal) | Confirm temperature, humidity, conditioning and test voltage. |
| Through-hole resistance | Per approved continuity test plan | Per approved continuity test plan | Continuity threshold and unit must be specified in the electrical-test plan. |
| Thermal shock | 3 脳 10 sec @ 288 鈩� | 3 脳 10 sec @ 288 鈩� | Confirm specimen, conditioning, cycles and acceptance method; not an operating-temperature rating. |
| Warp & twist | 鈮� 0.7% | 鈮� 0.7% | Define the panel/board condition and measurement method. |
| Electric strength | > 1.3 kV/mm | > 1.4 kV/mm | Material test reference; confirm test method and dielectric construction. |
| Flammability | 94V-0 material / construction option | 94V-0 material / construction option | For the selected recognized material/construction; request the applicable UL file and thickness range. |
| Test voltage | 50鈥�330 V | 50鈥�330 V | Electrical-test setting; not rated operating voltage. |
Specify reliability test vehicles, conditioning, sampling and acceptance before release. More build-up stages are not proof of greater reliability.
Materials & surface finishes
FR-4, high-Tg, halogen-free, low-loss and RF laminates are selected by grade and construction. Finish options include ENIG, ENEPIG, OSP, immersion silver / tin, and electrolytic hard gold / gold fingers.
State the finish and required thickness or specification on the drawing. Material ratings and finish acceptance apply to the selected construction.
Engineering decisions before release
Via-in-pad & sequential lamination
Define whether the feature is copper filled or resin filled, capped and planarized. Document the final pad condition needed for assembly.
Design and cost review
Use the via geometry and budget workbench once the architecture is clear. Ultra-fine lines or mSAP require separate process confirmation.
Continue with design or budget planning
HDI stackup and lamination planning. Use the service-page tools for geometry or budget planning, or send your existing files directly for review.
Inspection evidence for your supplier review
Agree IPC-6012 for applicable rigid-board performance and IPC-A-600 for board acceptability, including revision, class and customer requirements. Request the relevant evidence against the part number and drawing revision.
IPC-6016 is superseded. Select IPC-6012, IPC-6013 and/or IPC-6018 as appropriate to the construction, with an explicit microvia reliability plan. See the .
- Current ISO 9001 documentation and applicable UL file / construction scope for supplier qualification.
- Approved drawing, material identification, lot traceability and agreed inspection records.
- Dimensional, electrical-test and any specified coupon / microsection results.
Quality system and supplier documents 路 Inspection workflow 路 Equipment and process evidence
HDI PCB capability questions
Can I use a 10:1 aspect ratio for a laser microvia?
No. The 10:1 entry describes through-hole review. A microvia needs its own dielectric depth, opening diameter, taper, pad and plating/fill assessment.
Does the 78-layer platform range mean a 78-layer any-layer board is approved?
No. It is the extended host-board platform range. HDI architecture, copper and reliability must be reviewed separately; the earlier HDI-specific range is stated next to the table.
What should I specify for HDI acceptance?
Select the performance specification for the board construction, its revision and class, plus the agreed microvia qualification and test plan. A generic 鈥淗DI compliant鈥� statement does not define these requirements.
Send the drawing. Define the build.
Send what you have. Mark any requirement where you need an engineering recommendation, and identify the current revision.
- Gerber data, drill files and a complete layer / via-span map.
- Build-up structure, dielectric depths, laser openings and capture pads.
- Filled / stacked / staggered features, finished copper and controlled impedance.
- Reliability requirements, acceptance class, report scope and quantity.
Ready for a manufacturability review?
Upload the files through Contact. The reply can define pricing, delivery, process exceptions and the agreed test scope.
Send files for an exact quote