吃瓜tv / HIGH-FREQUENCY ENGINEERING
High Frequency PCB: Materials, Loss & Design
Understand which dimensions, material properties and test conditions control your RF path. Estimate phase and dielectric loss, review the return path, and turn the design into a manufacturing specification.
Send files for an RF PCB quoteCalculate loss & phaseFor an exact quote, include quantity, stackup, material grade and inspection requirements.
When does a PCB need high-frequency design treatment?
A high-frequency PCB is designed with transmission-line behavior, loss, coupling and phase in mind. There is no universal frequency at which every board must change material. Route length, bandwidth, geometry, acceptable loss and phase error all affect the decision.
For a sinusoidal RF signal, compare the physical path with its guided wavelength. For a digital signal, edge rate and its spectrum matter in addition to clock frequency. A fast-edge digital board and an RF carrier board can share layout constraints while having different acceptance tests.
Useful starting question: What loss, impedance variation and phase error can the complete path tolerate, including connectors and transitions?
For brand selection and manufacturing cost drivers, use the RF PCB materials and manufacturing hub.
Read Dk and Df with their measurement conditions
Dk used in a circuit model is not automatically the value measured for laminate process control. Df is also tied to a method and frequency. Use the data for the selected construction, and do not turn a datasheet into a hard maximum-frequency rating.
| Reference grade | Process / nominal Dk | Design model reference | Df reference |
|---|---|---|---|
| RO4003C | 3.38 ± 0.05 at 10 GHz | 3.55, 8–40 GHz | 0.0027 at 10 GHz |
| RO4350B | 3.48 ± 0.05 at 10 GHz; 4 mil exception | 3.66, 8–40 GHz | 0.0037 at 10 GHz |
| RT/duroid 5880 | 2.20 ± 0.02 at 10 GHz | 2.20 model starting value; confirm construction | 0.0009 at 10 GHz |
Sources: and . RO4350B 4 mil laminate has a different published process Dk. These are reference/typical data, not a manufacturing tolerance assigned to a finished trace. LoPro and other foil constructions need their own review.
Compare RO4350B versus RO4003C for that material decision, or RO3003 for a different RF material family. Broader grade selection belongs in the high-frequency material buying guide.
Calculate electrical length and dielectric-only loss
This workbench models a homogeneous dielectric TEM path, such as an ideal stripline. It exposes how length, frequency and loss tangent affect the result. Microstrip fields also occupy air, so use the material-specific microstrip tools or a field solver for that geometry.
High Frequency Loss & Phase Planner
Equations and an example you can check
Guided wavelength λg = c / (f × √εr). Unwrapped phase = 360° × length / λg. Propagation delay = length × √εr / c. Dielectric-only attenuation in dB = 8.686 × π × f / c × √εr × tanδ × length, using SI units. The model is non-dispersive and assumes low dielectric loss.
At 10 GHz, εr = 4, tanδ = 0.002 and 50 mm length, λg is about 14.99 mm, delay is 333.56 ps and dielectric-only attenuation is about 0.182 dB. The unwrapped phase exceeds one turn. This is an illustrative homogeneous model, not a measured PCB.
Separate the contributors to insertion loss
| Contributor | What changes it | Useful design action |
|---|---|---|
| Dielectric loss | Loss tangent, field distribution, frequency and path length. | Compare relevant-frequency data; reduce unnecessary path length. |
| Conductor and roughness loss | Conductivity, surface profile, trace geometry and frequency. | Specify foil and include a suitable conductor model; extra copper thickness is not a universal cure. |
| Mismatch and discontinuities | Launches, pads, vias, plane changes and geometry errors. | Model transitions with their actual reference structures. |
| Radiation and coupling | Discontinuities, layout, enclosures and neighboring conductors. | Review the complete geometry and isolation requirements. |
Do not add a generic “copper loss per inch” to a Df calculation and call it measured S21. A low-loss laminate may still produce a poor RF path if transitions dominate. discuss design Dk and circuit-material effects.
Follow the signal and its reference together
Check the continuous reference below each RF route, then examine every plane interruption and layer or connector transition. The animation highlights review locations rather than simulating electromagnetic fields.
RF Return Path Review
- Continuous reference: the signal geometry includes its return conductor.
- Plane interruption: a slot or clearance can invalidate the line model.
- Transition: include nearby ground connections and the complete pad/via/launch geometry.
Grounded coplanar waveguide depends on trace width, side gap, substrate height, ground geometry and via arrangement. It is different from unbacked CPW. The is a useful reference; fixed spacing copied from another stackup is not a universal rule.
Turn the application into measurable requirements
| Application | Design concern | Give the manufacturer |
|---|---|---|
| RF front ends and local oscillators | Matching, isolation and unintended coupling. | Band, critical geometry, reference planes and connector/assembly requirements. |
| Power amplifiers | RF loss together with thermal and power constraints. | Power/duty cycle, thermal interfaces, material/foil and test conditions. |
| Filters and couplers | Electrical length and dimensional repeatability. | Critical features, material model and agreed frequency-response limits. |
| Radar and phased arrays | Channel phase, transitions and array integration. | Operating band, phase/amplitude limits and measurement plan. |
| Antenna feed networks | Feed loss and geometry in the installed assembly. | Feed impedance, interface, enclosure/mounting and required RF tests. |
Use radar PCB, amplifier PCB or antenna PCB for their application-specific considerations. No application label by itself establishes certification or a tested operating band.
Plan the measurement before releasing the board
For a VNA result, state the calibration/reference plane, fixture and de-embedding method, sweep range and limits. For a coupon, agree how it relates to the product geometry. Electrical continuity, characteristic impedance, return loss and insertion loss are different checks.
| Required answer | Suitable evidence to agree |
|---|---|
| Are the specified nets connected and isolated? | Bare-board electrical test under the agreed specification. |
| Does the coupon meet an impedance target? | Coupon construction and impedance measurement record. |
| Does the path meet RF response limits? | Calibrated S-parameter test with stated ports and reference planes. |
| Will an antenna radiate as required? | Appropriate radiation/OTA testing of the relevant assembly; S11 alone is insufficient. |
Coordinate the test scope with quality assurance. The photo does not imply every board receives RF or over-the-air testing.
Budget for the board and the required evidence
Use this small-board planning model only for an initial allowance. Choose the grade already under consideration; the default RT/duroid 5880 selection is an example, not a recommendation. Test development and RF qualification need a separate scope and quotation.
High Frequency PCB Budget Planner
For the full set of cost drivers and material routes, return to RF PCB manufacturing and cost. You can request an exact quote without using the estimator.
High-frequency PCB design questions
Does every signal above 1 GHz need a special laminate?
No. Evaluate electrical length, allowable loss, phase, geometry and the actual FR-4 construction. A frequency label is not a complete selection rule.
Why do the design and process Dk values differ?
They describe different characterization/modeling conditions. Use a value supported for the construction and solver instead of substituting one measurement for another.
Can this tool calculate total insertion loss?
No. It computes dielectric-only attenuation for the stated homogeneous model. Conductor, roughness, transitions, radiation and mismatch are excluded.
Why does line length matter when impedance is correct?
Impedance matching does not remove propagation delay, phase accumulation or distributed loss. A long matched path can still exceed the system budget.
Should I use microstrip, stripline or grounded coplanar?
Compare the necessary routing layer, return structure, shielding/coupling needs, conductor and dielectric losses, launch and manufacturing constraints. Each needs the correct geometry model.
Is thicker copper always better at high frequency?
No. Skin effect, roughness and trace geometry matter; thicker copper also affects etching and impedance. Evaluate the actual conductor construction.
Does a clean impedance coupon guarantee the RF circuit works?
No. A coupon does not validate every connector, transition, component or enclosure effect. Agree product-specific RF acceptance where needed.
Can I replace RO4003C with RO4350B without a review?
Review electrical data, geometry, material requirements and process details before substitution. Similar grades are not automatically identical circuit models.
Move from a design estimate to a reviewed construction
Send the intended band, route/stackup geometry, material and foil, critical impedance/phase requirements, Gerber/ODB++ data, drill files, quantities and proposed measurements. If the model is preliminary, include its assumptions and unresolved decisions.
Send files for an RF PCB quoteMicrostrip geometry: RF PCB design brief. Detailed radiator work: antenna design tools.