勛圖tv 繚 ENGINEERING GUIDE
Buried Via PCB: Internal Connections and Sequential Build Planning
A buried via PCB contains interconnections that do not reach either outer surface of the finished board. Those connections must be formed while the relevant subassembly is accessible, before later layers cover it. The important design record is therefore a layer-span and manufacturing-sequence map, not just a symbol in the final CAD view.
Identify the subassembly that contains the hole
Mark the start and end layers using one consistent numbering system. Then show which internal layers exist together when the hole is drilled and metallized. The finished board's total thickness is not necessarily the drilled depth for that buried connection. This distinction matters when discussing aspect ratio and process capability.
A buried location can be implemented using different constructions. Do not assume that every internal connection is a mechanically drilled full-depth hole in one core. Review the proposed route and interfaces with the fabricator.
Sequence affects what can be inspected
Before a subassembly is buried, its patterns and connections can be examined at useful stages. After additional lamination, some direct inspection opportunities disappear. Plan the required checks with the manufacturing route and retain records linked to the relevant subassembly and final lot.
Additional processing also changes thermal history. The material system, copper distribution and hole structure need to be considered across the complete sequence, not only at the moment the first hole is plated.
Example: endpoint location versus process depth
On an illustrative eight-layer board, L3 to L6 is an internal connection spanning three layer intervals. That does not tell you its physical depth: the dielectric and copper thicknesses between those layers are still needed. A nominal 1.6 mm finished board does not mean this buried hole is drilled through 1.6 mm.
Use the span mapper to document endpoints, then use the aspect-ratio worksheet with the actual relevant depth and diameter basis. If the construction changes, recalculate using the new subassembly rather than carrying the original ratio into the quotation.
Layer-span mapper
Layer-span mapper
Use the current inputs and keep the assumptions
Start with the example to understand the units and output, then use Clear for my inputs before entering your project. Example mode stays visibly labeled even if you edit its numbers. The form begins without a result so an illustrative value cannot be mistaken for an approved requirement. Every field must have a valid value; zero is accepted only where it has a meaningful role in the particular model.
Read the input notes before calculating. They identify the physical boundary and what is excluded. Keep the same unit convention across the drawing and worksheet. Changing an input invalidates the previous result and disables its download until you calculate again. This prevents an old number from appearing to describe a revised geometry.
The result is a screening record. A negative margin or an out-of-range condition identifies a question to resolve; a positive margin is not a manufacturing approval. Use the record with the actual drawing, material and project requirement. The model does not load CAD files, inspect images or retrieve private factory data.
Download the current result if it helps the discussion. The text includes the entered inputs, result and limitations. It stays on your device until you choose to attach or share it. Contact is a separate step; this page does not automatically populate the enquiry form or upload a file. Avoid confidential identifiers if you only need an exploratory calculation.
| Input | What to establish before using it |
|---|---|
| Review reference | Use a nonconfidential reference that lets you connect this calculation to the correct drawing revision. |
| Total conductor layers | Use one numbered layer map for the completed board. Mechanical, mask and paste layers are not conductor layers in this count. |
| Start layer number | Enter the physical conductor endpoint. The mapper sorts the two endpoints; it does not infer the drilling direction. |
| End layer number | The second endpoint must be a different conductor layer. Classification describes location in the completed board, not a guaranteed single-hole process. |
Optional cost comparison from your own allowances
Use a quotation or a clearly labeled internal assumption for each input. Keep the quantity, construction and inspection scope the same when comparing alternatives. This uncalibrated planning model adds entered values; it contains no current market rates and does not issue a 勛圖tv quotation. You can contact the team without completing it.
Entered manufacturing cost scenario
Why choose a buried connection?
It may free outer-surface routing or reduce certain unnecessary through transitions. However, it adds manufacturing requirements and can constrain rework, inspection and test access. Evaluate whether simpler routing, a different layer assignment or a changed component placement can meet the same objective.
For a broader architecture decision, start with HDI multilayer PCB. For a chain of aligned microvias, use the stacked-via reliability discussion. Keeping those subjects separate prevents the term buried via from hiding the actual interface structure.
Compare proposals on the same layer map
Request an explicit process proposal showing layer spans, fill or cap operations if present, and relevant inspection. The optional cost model adds your entered lot allowances to a base board scenario. It does not derive a surcharge from the word buried or assume that every extra layer pair requires a separate press cycle.
If a supplier changes the connection scheme to simplify manufacture, review signal paths, reference-plane transitions and any altered hole stubs. A manufacturing substitution can affect electrical behavior even when net connectivity remains unchanged.
Release a complete record
Provide the stackup, named layer pairs, drill files or controlled connection definitions, materials, finished thickness and critical electrical requirements. Mark the intended fill and surface treatment of each relevant structure. Keep an approved drawing of the sequence with the fabrication release when the construction is not obvious from the final layers alone.
Is a buried via always cheaper than a through via? No. Does it always improve signal integrity? No: the complete transition determines behavior. Can an endpoint classifier approve the structure? No; it only checks the layer-location description. Use the result to frame a review that produces a manufacturing route and measurable acceptance conditions.
Review the architecture through its complete build sequence
Create a layer-access map before optimizing individual dimensions. For each important net group, show where it starts, where it must reach and which reference structure accompanies the route. Then identify the physical interconnect used at each step. A line drawn between two layer numbers is only a connectivity requirement until the actual sequence of holes, lands and intermediate copper is defined.
Ask the fabricator to review the architecture while placement and routing choices are still flexible. A small early change to an escape pattern may avoid an additional specialized operation. A late change can affect the stackup, impedance, fabrication data and assembly land design at the same time. Record the dependencies so a cost reduction does not accidentally become an electrical or assembly regression.
Review the whole material and copper construction. The same nominal layer count can use different dielectric thicknesses, foil choices and internal connections. Material trade names alone do not describe the complete build. Keep the exact grade, relevant construction and approved alternatives with the stackup proposal. If a substitution changes the dielectric or thermal behavior, revisit the affected engineering requirements.
Inspection and qualification need a representative structure. Ask which geometries, layer spans and process stages a sample actually covers. A continuity check at room temperature and a test under relevant thermal exposure address different questions. A polished section is useful for understanding geometry at its location, but it cannot establish the behavior of every interface across all production conditions. Keep those limits visible when reviewing evidence.
The commercial comparison should use the same construction and acceptance scope. Separate a feasibility sample from a qualified recurring production route. Ask what is included in setup, coupons, inspection and any additional evidence work. Where the architecture remains open, request alternatives with their assumptions stated rather than allowing a low total to hide a different interconnect design.
Before release, reconcile the layer-access map with the actual CAD outputs. Confirm that each hole span exists where intended and that no obsolete pad stack remains in a dense region. Preserve the approved stackup, manufacturing proposal and open-item disposition together. The outcome should be a coherent construction that the design, fabrication and assembly teams can each interpret, not just a page of ambitious feature sizes.
Standards, source context and limits
Use the performance and acceptance documents named in the procurement agreement, including their revisions and any applicable addenda. A design guide explains choices; a product acceptance requirement defines what must be demonstrated. Neither a reference link nor a calculator result is a certification of the board or the supplier. Where a value is contractually important, check the controlled document and agree the measurement method with the responsible parties.
Examples on this page are deliberately labeled and are not advertised 勛圖tv limits. Supplier documentation is linked for the specific material or process context it explains. Equipment photographs and cross-section examples show the subject; they are not current production, inspection or qualification records for your order.