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Distinguish access from a single physical hole

A connection from an outer layer to a distant internal layer can be made through several microvia stages and intervening copper. That is not the same physical feature as one deep blind hole. A layer-pair list helps reveal how many interfaces and routing transitions sit in the electrical path. It also makes review of alternative layouts much easier.

The span mapper below classifies the entered endpoints as through, blind or buried relative to the complete board. That classification says where the connection begins and ends. It does not prove that a single drilling operation can produce it or select the microvia stages that implement it.

When the architecture earns its complexity

Consider any-layer access when dense packages and board-area constraints produce a real routing limitation. First test whether a simpler HDI multilayer architecture can meet the same functional requirement. Improving component placement or net assignment can sometimes reduce difficult transitions before fabrication complexity is added.

Review return paths, power access and test strategy alongside routing density. A successful fanout is only one part of a functioning board. Via-in-pad structures may improve local placement options, but they introduce fill, planarization and cap requirements that must be coordinated with the assembly land design.

Stacked and staggered are separate decisions

Vertical alignment of successive microvias can conserve area, while staggered transitions consume routing room between stages. Each topology has construction and reliability implications. The page on stacked vias examines interfaces and evidence; it should not be replaced by a simple rule that all stacked structures are acceptable or that all must be rejected.

Do not infer a permitted stack height from a photograph of a different board. Ask which material, geometry, copper filling process and thermal qualification are represented. The required evidence becomes more useful when the sample construction resembles the proposed product rather than merely sharing the term ELIC.

Layer-span mapper

Optional cost comparison from your own allowances

Use a quotation or a clearly labeled internal assumption for each input. Keep the quantity, construction and inspection scope the same when comparing alternatives. This uncalibrated planning model adds entered values; it contains no current market rates and does not issue a 吃瓜tv quotation. You can contact the team without completing it.

Example: map the path before counting cost

On an illustrative ten-layer board, a connection from L2 to L8 has both endpoints inside the completed board. It is therefore internal or buried in location, but its implementation could involve several adjacent-layer microvias and connecting lands. Entering L2 and L8 in the worksheet yields a six-interval span. It does not authorize a six-dielectric-deep laser hole.

Draw the actual stages and identify where each receiving land is available for cleaning, filling and inspection. Then review how a change in escape routing affects the number of interfaces and manufacturing operations. Count the process stages from the proposed route, not from the endpoint arithmetic alone.

Request a process-specific quotation

The optional budget form separates base-board value from the additional interconnect route, inspection and setup allowances entered by you. It is useful for comparing two reviewed constructions with equivalent delivery conditions. It does not apply a universal HDI multiplier or estimate factory yield.

Ask whether copper thickness growth, fill planarity, material availability or panel utilization influences the quote. Clarify which qualification activity is included and which is a separate engineering build. A prototype quotation is not automatically a volume qualification commitment.

What to submit for an engineering review

Provide the proposed stackup, all layer-pair connections, package pitch and land details, outline constraints and intended build quantity. Mark optional connections that could be rerouted. Include the electrical and thermal context needed to judge whether a topology change is acceptable.

Use this page for architecture selection and the copper-filled via guide for the filling mechanism. The next useful step is a reviewed layer-access drawing with explicit assumptions, followed by a controlled release package. That is more actionable than requesting the smallest possible holes without specifying what they must connect.

Review the architecture through its complete build sequence

Create a layer-access map before optimizing individual dimensions. For each important net group, show where it starts, where it must reach and which reference structure accompanies the route. Then identify the physical interconnect used at each step. A line drawn between two layer numbers is only a connectivity requirement until the actual sequence of holes, lands and intermediate copper is defined.

Ask the fabricator to review the architecture while placement and routing choices are still flexible. A small early change to an escape pattern may avoid an additional specialized operation. A late change can affect the stackup, impedance, fabrication data and assembly land design at the same time. Record the dependencies so a cost reduction does not accidentally become an electrical or assembly regression.

Review the whole material and copper construction. The same nominal layer count can use different dielectric thicknesses, foil choices and internal connections. Material trade names alone do not describe the complete build. Keep the exact grade, relevant construction and approved alternatives with the stackup proposal. If a substitution changes the dielectric or thermal behavior, revisit the affected engineering requirements.

Inspection and qualification need a representative structure. Ask which geometries, layer spans and process stages a sample actually covers. A continuity check at room temperature and a test under relevant thermal exposure address different questions. A polished section is useful for understanding geometry at its location, but it cannot establish the behavior of every interface across all production conditions. Keep those limits visible when reviewing evidence.

The commercial comparison should use the same construction and acceptance scope. Separate a feasibility sample from a qualified recurring production route. Ask what is included in setup, coupons, inspection and any additional evidence work. Where the architecture remains open, request alternatives with their assumptions stated rather than allowing a low total to hide a different interconnect design.

Before release, reconcile the layer-access map with the actual CAD outputs. Confirm that each hole span exists where intended and that no obsolete pad stack remains in a dense region. Preserve the approved stackup, manufacturing proposal and open-item disposition together. The outcome should be a coherent construction that the design, fabrication and assembly teams can each interpret, not just a page of ambitious feature sizes.