勛圖tv 繚 ENGINEERING GUIDE
Synchronize PADS Logic and Layout: Review ECO Changes
Synchronizing PADS Logic and Layout means reconciling design changes under an agreed direction of authority. It is not simply making two files have matching dates. Component identity, pin connectivity, footprints and constraints can change for different reasons, so the proposed engineering change order needs review before it is applied.
The net-pin worksheet compares two small CSV maps and reports added, removed or changed reference-pin connections. It does not generate a native PADS ECO or modify a project. This page owns the change-review task; use PADS schematic design for capture and PADS layout for physical board preparation.

Identify the product, version and authoritative source
PADS names cover different products and workflows. Record whether the project uses PADS Logic with Standard or Plus Layout, or a different PADS family and capture environment. A tutorial for one product should not be assumed to describe the controls or file relationships of another.
Keep both the schematic and layout snapshots before reconciliation. Identify the accepted starting revision and the intended change. If both sides were edited independently, establish ownership of each change rather than blindly overwriting one side. A designer's local copy may contain a useful physical adjustment that has not yet been communicated back.
Siemens has documented synchronized design workflows, but the exact operation depends on the installed product and version. The official historical synchronization article is context, not evidence that a particular present-day menu or license behaves identically. No native PADS ECO application was executed for this guide.
Classify the changes before accepting them
Separate component additions and removals from reference renaming, net renaming, pin swaps, footprint changes and constraint edits. These can look similar in a long change list while having different physical consequences. A renamed net may preserve connectivity, whereas changing one pin's net can alter the circuit.
Check whether a component replacement changes pin numbering or package geometry. A familiar reference designator does not prove that the replacement footprint is compatible. Review the device source and library mapping before carrying the change into routing or manufacturing output.
Record legitimate layout-originated changes that need back annotation, using the supported workflow and review process. Do not use a generic CSV difference report as an instruction to perform pin or gate swaps. Such operations need the component's permitted interchangeability and the native design model to remain consistent.
| Review item | What to establish |
|---|---|
| Authority | Identify product/version, starting revision and change direction. |
| Differences | Separate renaming, connectivity, footprint and constraint changes. |
| Native review | Preview and apply approved changes in the correct PADS workflow. |
| Release | Inspect logical agreement, physical effects and regenerated files. |
Net-pin change comparison
Net-pin change comparison
Use the current inputs and keep the assumptions
Start with Load example when learning the workflow, then use Clear for my inputs before working with a real release. The example label remains visible if you edit sample values. Complete the units and scope fields before generating a result. An empty input is not silently treated as zero, and a changed input invalidates the previous result and download. Correct the highlighted explanation and run the check again.
The worksheet works on information entered here. It does not read a CAD project, compare a ZIP with your drawing, or contact a manufacturing database. A report can document questions and calculations, but the original design and receiving software remain the source for geometry and connectivity. Downloading a report does not send an enquiry; attach useful results manually when contacting 勛圖tv.
| Input | What to establish before using it |
|---|---|
| Review reference | Use a nonconfidential revision or task reference. |
| Before net-pin map 繚 CSV | An exported or manually reviewed map; one reference/pin per row. |
| After net-pin map 繚 CSV | Names are case-sensitive. This is a comparison record, not a native PADS ECO file. |
Compare a small net-pin map to expose specific differences
The worksheet expects Reference, Pin and Net columns with one row per reference-pin pair. Names are compared as entered and are case-sensitive. Duplicate pairs are rejected because they make the declared mapping ambiguous. Prepare the extract from a trusted export or reviewed list without including unnecessary private project information.
For example, U1 pin 2 changing from IN to FILTERED_IN is reported as a changed connection. The tool does not know whether that is an intended filter insertion, a harmless renaming or an error. The reviewer must examine the circuit and the rest of the connectivity to interpret it.
Added or removed pairs describe differences in the supplied maps, not automatically added or removed physical components. A partial export can omit a pin that still exists in the native design. Confirm the extraction scope before treating every reported difference as an ECO action. Large results are summarized, with only the first hundred changes displayed.

Apply the approved change in the native workflow
Use the installed PADS workflow to preview and apply the intended change set, retaining logs or reports as appropriate. Review its scope and direction before committing. A command that transfers information successfully can still apply an incorrect decision if the source authority was never established.
After application, inspect affected components, padstacks, unrouted connections and constraints. A footprint change can require placement or routing work beyond the logical update. Do not assume existing traces remain suitable merely because their endpoints still appear connected in the editor.
Preserve a rollback point for the design revision, not just an exported file. Reversing a change may require the prior library and constraint context as well as the PCB database. Keep the engineering record coherent so another designer can reproduce the decision and the resulting state.
Verify synchronization at logical and physical levels
Compare the intended net-pin relationships after the update and inspect the native consistency reports. Then review the physical consequences in layout. Logical agreement does not prove adequate clearance, return paths or mechanical fit; those require the relevant board checks.
Regenerate planes or other design-dependent content where required and rerun applicable checks. A component moved to satisfy a new connection may disturb neighboring clearances or an assembly envelope. Review those affected areas rather than interpreting a successful ECO import as a completed design revision.
If differences remain, describe whether they are deliberate, unresolved or outside the comparison scope. Avoid a blanket synchronized status when only a small reference subset was checked. The worksheet report is useful evidence of one comparison, but it does not establish full native database equivalence.
Release the revised design as a coherent package
Assign the revised source an identity and summarize the meaningful changes. Regenerate affected manufacturing and assembly outputs together, then inspect the exact files. A schematic-only correction may leave physical data unchanged, while a footprint or pin change can require a broader release; the change record should explain which case applies.
Keep BOM and placement references consistent after renumbering. A PCB can be electrically correct while an old assembly file still associates a reference with the wrong position. Review the manufacturing file hub for the complete handoff and identify the authoritative revision for the recipient.
For a 勛圖tv question, include the revised package and a concise description of changes affecting fabrication or assembly. State unresolved design questions separately from manufacturing requirements. This makes it possible to review the build without asking the receiving engineer to infer an ECO history from unrelated old and new files.
Keep capture, physical design and changes traceable
Record which PADS product and version owns each source, which libraries and constraints are required, and how approved changes pass between capture and layout. A viewer can support review without establishing editing or release capability. Use native logs and representative comparisons to show what was actually checked.
For a change, retain its intended direction and its effect on component identity, connectivity, footprints and physical geometry. A small CSV comparison supports one part of that review; it is not a replacement for native synchronization. The final release should connect the approved circuit to the inspected manufacturing files. If those identities are unclear, resolve them before asking a receiving team to decide which of several plausible versions should be built.
Standards, source context and limits
Use the documentation for the exact application version and output format. A file specification defines how information is encoded; it does not approve the electrical design, set a factory process limit or replace an agreed manufacturing drawing. The references below support the relevant format and software details. Worked examples are instructional, and any native application test is identified by its specific version and scope.
For fabrication scope and the agreed construction requirements, see PCB manufacturing.