勛圖tv 繚 ENGINEERING GUIDE
IC Substrate: Die-to-Board Interconnect and Design Handoff
An IC substrate connects a semiconductor die or die assembly to the next level of interconnect, often through a package that mounts on a PCB. It is part of the package architecture, not simply a smaller version of any ordinary circuit board. Its materials, features, assembly interfaces and test responsibilities must be defined at that boundary.
This page helps engineers prepare a package-to-board discussion. The geometry worksheet estimates how many uniform traces fit through an ideal corridor between circular lands. It is a first-pass illustration and does not establish package-substrate or PCB fabrication capability.
Identify the interfaces and their owners
Draw the die-side connection, substrate interconnect and board-side connection. Record who supplies the die or package information, who designs the substrate and who owns the receiving PCB. A missing interface definition can create problems even when each individual drawing looks complete.
Keep the deliverable explicit in an inquiry. Package-substrate fabrication, die attachment, package assembly, bare-board fabrication and PCBA are different services. A supplier's ordinary PCB capability should not be interpreted as proof that it provides all of those package-level operations.
Interconnect levels
| Record | Meaning | Avoid this shortcut |
|---|---|---|
| Die interface | Defined package connection geometry | Not the receiving-board footprint |
| Package substrate | Interconnect and material construction | Not ordinary PCB capability proof |
| Receiving PCB | Approved package interface and board rules | Not an inferred ball diameter |
Separate package lands from board lands
The dimensions used on one side of an interface may not be the same as those used on the other. A ball diameter, package land and PCB land are distinct features. Preserve the component or package documentation and its recommended board-interface information where applicable.
The worksheet uses circular copper-land diameter and center pitch. It does not infer those values from the package name or a photograph. If the actual shape is noncircular or the routing region is constrained by vias and necks, the ideal corridor model needs a more detailed layout review.
| Review item | What to establish |
|---|---|
| Interfaces | Die side, package substrate and receiving PCB with clear owners. |
| Geometry | Pitch, actual land diameter, trace width and required separation. |
| Scope | Package fabrication and board fabrication are distinct services. |
| Limit | Ideal escape count is not process or package qualification. |
Ideal escape corridor width
Ideal escape corridor width
Use the current inputs and keep the assumptions
Start with the example only to inspect the units and the calculation boundary. Replace every assumption with a value tied to your own document or measurement. An empty numeric field is not zero. The review-reference field is a local label; avoid entering customer names, confidential part numbers or other private information into a public worksheet.
After calculating, read the notes alongside the numerical result. Changing any input invalidates the displayed result and disables its download until you calculate again. For a comparison, keep the units, geometry, material condition and measurement boundary consistent. A long decimal result does not imply equally precise input data. The downloadable record stays on your device and can be attached manually to an inquiry. It is not automatically transferred into the Contact form.
If an input is unknown, identify the person or document needed to resolve it. Do not fill a gap with a favorable generic value simply to obtain a result. You can request a material or fabrication review without using the tool. The arithmetic illustrates a relationship; it does not accept a construction, certify a material, establish current pricing or replace a supplier process specification.
| Input | What to establish before using it |
|---|---|
| Review reference | Nonconfidential revision label. |
| Pad center pitch 繚 繕m | Regular circular pads at equal pitch. |
| Pad diameter 繚 繕m | Copper land, not ball diameter. |
| Finished trace width 繚 繕m | One uniform routing width. |
| Required copper separation 繚 繕m | Designer-entered requirement; tool does not select an IPC limit. |
Understand the escape-corridor arithmetic
For adjacent circular lands on a regular pitch, the simple edge-to-edge corridor is pitch minus land diameter. If N equal-width traces are placed between the lands, the model requires N trace widths and N plus one clearances. It counts only what fits geometrically under those assumptions.
The entered clearance is a designer-supplied requirement, not a value selected from IPC by the tool. Registration, etching, solder mask, via capture and diagonal escape are excluded. A result of one or more traces is not manufacturing approval, while zero indicates only that this simplified corridor does not fit the entered geometry.
Worked example: two traces in an ideal corridor
Assume 500 繕m pitch, 250 繕m circular lands, 50 繕m traces and 50 繕m copper separation. The corridor is 250 繕m. Two traces need 100 繕m of copper plus three 50 繕m separations, also totaling 250 繕m in the ideal arithmetic.
There is no additional allowance in that exact-fit result. Real feature variation and surrounding layout may make it unsuitable. Treat the example as a reason to ask for a detailed design-rule and manufacturing review, not as evidence that a particular supplier can produce the package substrate at those dimensions.
Connect material choice to architecture
The core and buildup system influence the physical and electrical design, but a resin-family name does not define the complete substrate. Keep exact grades, layer structure, metal distribution and interface requirements with the architecture.
The organic-core versus glass-core page discusses a package-level comparison, while the BT material page explains one resin-family context. Neither page should be used to assume that every package uses the same material or that an ordinary PCB process can be substituted without review.
Review power, signal and thermal paths together
Package interconnect must support the relevant signal and power paths and their interfaces. Keep the electrical reference planes and model boundaries explicit. Local geometry, return paths and transitions can matter independently of the nominal material property.
Thermal and mechanical behavior also depends on the assembled structure. A simple free-expansion calculation cannot replace package warpage or joint-reliability analysis. If embedded passive structures are proposed, the Ohmega material guide illustrates why geometry, processing and verification must be connected rather than inferred from a schematic value alone.
Define inspection and acceptance at each level
State what is inspected or tested at substrate, package and assembled-board stages. Preserve netlist, geometry, material and assembly records at the appropriate boundary. A passed bare-substrate electrical test does not prove every function of the final packaged device.
Identify required traceability, test access and handling before quotation. If a process is still under development, mark its evidence status clearly. Avoid translating an attractive package concept into a guaranteed yield or reliability claim without the construction-specific qualification and production evidence.
Prepare a clear supplier handoff
Send the intended deliverable, interface drawings, material requirements, geometry, quantity and acceptance scope. Identify which package data are available and which decisions remain open. If the request concerns the receiving PCB, provide the approved package footprint and assembly requirements rather than asking the board supplier to infer them.
The local corridor worksheet can document a preliminary layout question. It does not replace CAD verification, supplier rules or package qualification. A useful response should clarify the manufacturing scope and required evidence, allowing the right specialist to address the right interconnect level.
Separate package-substrate architecture from board fabrication
An IC package substrate connects a die or die assembly to the next interconnect level. A motherboard or module PCB receives the package through a separately defined interface. Their feature sizes, assembly processes, materials and test responsibilities need not be the same.
Before requesting manufacturing support, identify the deliverable: package substrate, bare module board, assembled PCB or a technical feasibility review. Do not assume that a supplier's ordinary PCB capability automatically covers die attachment, fine-pitch package buildup, glass-core processing or package-level qualification.
Keep electrical, thermal and mechanical requirements tied to the package architecture and its interfaces. Drawings, die/package information, material requirements and acceptance evidence should have explicit owners. The calculations here explain limited relationships; supplier availability, process capability and qualification remain project-specific questions.
Standards, source context and limits
Use the edition, amendment and material-document revision named in the purchase agreement. A standards title, marketing label or supplier product family does not establish that a particular lot meets a requirement. Public summaries are useful for scope; the controlled specification and applicable test method govern acceptance.
The examples on this page are illustrative engineering scenarios. They are not 勛圖tv production records or guaranteed material values. Source links identify the organizations responsible for the referenced information. Confirm applicability to the exact grade, construction and test condition before carrying a number into a drawing or qualification report.
