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The nominal sum is 1.600 mm: four copper contributions totaling 0.140 mm, two bondlines totaling 0.360 mm and a 1.100 mm core dielectric. These values are an illustrative bookkeeping example, not a stocked or approved ITEQ construction. Actual available materials, finished copper and thickness tolerances need confirmation. No surface-finish or solder-mask thickness is added by the example.

The layer roles also require electrical review. Naming L2 ground and L3 power does not automatically give every trace an acceptable reference path. Signal placement, plane continuity, transitions and the actual power-distribution design must be assessed. A mechanically convenient stack can still be unsuitable for the routed circuitry.

The source distinction between laminate and prepreg matters. The supports grade-specific review, while the manufacturer’s offers a separate supplier modeling resource. This ³Ô¹Ïtv worksheet does not claim to embed that service, synchronize its library or import a supplier-approved design.

The first error is counting core copper twice. If a supplier’s core dimension includes its copper faces, it cannot be entered directly as dielectric thickness while those copper faces are also listed as separate rows. Establish the convention, subtract copper only when the source definition justifies doing so, and record the resulting dielectric requirement with its appropriate tolerance.

The second error is treating raw prepreg thickness as a guaranteed pressed contribution. Prepreg changes state during lamination and interacts with the adjacent pattern. Use the agreed pressed bondline. A total of nominal raw sheet values can appear to meet a board-thickness target while misrepresenting the finished spacing that matters to impedance and insulation.

Keep units in the column labels. Do not combine micrometres, millimetres and mils without explicit conversion. One mil is 0.0254 mm. Copper weight may be a purchasing description, but a thickness calculation needs the appropriate thickness definition. Finished outer copper can include plating, whereas an inner foil entry may refer to a different manufacturing state.

The finished-board thickness requirement should also define how it is measured and what coatings are included. Local surface finish, solder mask and component attachment are different from the bare stack. Do not compare a bare dielectric-and-copper sum against a mechanical envelope without checking that the two quantities refer to the same object.

For a controlled impedance requirement, identify the signal layer, reference layer, target, tolerance and measurement scope. Record the design model and the agreed geometry rather than relying on a single generic Dk. The ITEQ Dk/Df comparison guide separates material reference conditions; those values are not automatically the effective permittivity of every routed structure.

Changing a bondline can change the required trace geometry. If a manufacturer proposes an available construction different from the initial drawing, update the impedance table and the affected layout assumptions together. A permitted width compensation should be documented within its scope. It must not accidentally change a critical pad, connector feature or clearance that the compensation was never intended to cover.

Reference continuity deserves its own check. A signal changing layers needs an appropriate return-current path under the actual topology. Plane splits and voids cannot be repaired by choosing a lower-loss laminate alone. Keep high-speed and power-distribution reviews separate from the worksheet’s thickness calculation, and preserve the relevant analysis with the released revision.

For a long or demanding channel, use the appropriate frequency-dependent material and conductor models. A single published Df does not include vias, launches or conductor roughness. Define the electrical evidence needed from a prototype or coupon before manufacturing, rather than treating a stackup drawing as a substitute for validation.

Start with a draft that clearly labels assumptions. The fabricator can then propose material constructions, thicknesses and process adjustments. Review each exception against the mechanical, electrical and application requirements. Resolve the differences and release a single approved version. Keep the original proposal and the accepted changes traceable so the production record can be understood later.

An approval should include the layer sequence and material identities, not only the total thickness. Two sequences can sum to the same dimension while assigning different spacings around a signal layer. Likewise, nominal symmetry in the list does not capture the distribution of copper across the panel. State what the symmetry check does and leave process-dependent conclusions to the relevant engineering review.

On a repeat order, compare the actual drawing revision and approved material list before reusing a previous quotation. A different prepreg style, resin content or foil option may be a meaningful change even when the family name and total thickness stay the same. Agree who may authorize such changes and what evidence must be repeated.

Send the final sequence, fabrication files, quantities and open questions through ITEQ PCB manufacturing or Contact. The downloaded stackup brief is supporting information; it is not a Gerber package, a purchase order or an automatic upload. Attach it manually when it helps explain the required construction.