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Derive the equation and check the limiting cases

With no load attached, the same current flows through R1 and R2. Their series resistance is R1 + R2, so the current is Vin / (R1 + R2). Multiplying that current by R2 gives the voltage across the lower resistor. This derivation explains why both resistors belong in the denominator and why the simple formula assumes that no other current leaves the output node.

Several quick checks catch wiring and spreadsheet errors. Equal resistors produce half the input voltage when unloaded. Increasing R2 while holding R1 constant moves the output toward Vin. Increasing R1 while holding R2 constant moves it toward the reference return. A passive positive-resistance divider connected between zero and a positive input cannot produce an output above that input. An unexpected result warrants checking units and node definitions before changing components.

For a target fraction 尾 = Vout/Vin between zero and one, R1 = R2 脳 (1/尾 鈭� 1) gives an ideal starting relationship. This expression does not choose the overall resistance scale. A 1 k惟/1 k惟 pair and a 100 k惟/100 k惟 pair have the same unloaded ratio but very different current consumption and source resistance. Selecting that scale is a separate design decision, not a hidden consequence of the voltage ratio.

Add resistor tolerance without pretending it is total accuracy

The nominal ratio is only one point in the component tolerance range. For positive Vin and a fixed resistive load, the lowest output occurs with R1 high and R2 low; the highest occurs with R1 low and R2 high. The tool evaluates those endpoint combinations using the common percentage tolerance entered for the two resistors. It keeps the load exact, so its displayed interval is specifically a resistor-tolerance interval.

With 1% resistors in the loaded 12 V example, the endpoints are approximately 3.960 and 4.040 V. Those numbers exclude supply error, load variation, temperature coefficients, leakage and measurement uncertainty. Adding the word accuracy to that interval would therefore be misleading. If a precision resistor network has specified ratio tracking, use its actual correlated behavior instead of treating its elements as unrelated parts with independent worst-case limits.

Write an error budget around the circuit requirement. State the supply range, receiver input behavior, reference error and environmental conditions alongside resistor data. Decide whether worst-case bounds or another justified method is appropriate; do not combine unrelated typical and maximum specifications into a guarantee. For a released design, the reviewer should be able to tell which error contributions are included, which are estimated and which still need measurements.

Power dissipation changes when the divider is loaded

The upper resistor's nominal dissipation is (Vin 鈭� Vout)虏/R1, and the lower resistor's nominal dissipation is Vout虏/R2. In the loaded example these are 6.4 mW and 1.6 mW respectively. The load takes another 1.6 mW. The source supplies 0.8 mA at 12 V, or 9.6 mW, matching the sum of those three dissipations. This conservation check is a useful way to catch a mistaken branch-current calculation.

The worksheet reports nominal resistor power, not a package power-rating decision or a worst-case thermal result. Resistor ratings depend on component construction and the manufacturer's specified mounting and temperature conditions. Applied voltage limits, pulse ratings and fault conditions may become limiting even when the calculated steady power appears small. Confirm those requirements in the actual resistor datasheet and keep the selected part number with the design.

Reducing both resistor values by the same factor preserves the unloaded ratio but increases divider current. Raising them reduces the ideal static consumption while making some loading and leakage effects more significant. Neither direction is automatically better. For a battery-powered sensor, compare the complete operating cycle and receiver requirements; for a continuously monitored power rail, include the normal and abnormal input ranges. A resistor divider should not be used as a general regulated supply for changing loads.

An ADC input is not necessarily a fixed resistor

A DC input-resistance specification does not capture every behavior of a sampled converter. Its acquisition circuit can draw transient charge, and the input must settle sufficiently during the available acquisition interval. A network that gives the desired DC ratio may still fail to settle at the selected sample rate. Read the particular ADC's input model, timing conditions and application guidance before representing it as a single load value.

TI's voltage-sensing application brief illustrates why resistor choice, a filter capacitor, sampling conditions and transient verification are considered together. Its component choices are tied to its example converter and operating conditions. This page does not generalize those values to every ADC. If a buffer is needed, its input range, output swing, settling and stability with the load become additional design checks.

An output capacitor also makes the network dynamic. For an ideal unloaded divider feeding a shunt capacitor, an initial estimate uses the divider's Thevenin resistance with that capacitance. The actual response can change when the receiver, source impedance or protection network is included. Use the capacitor units converter to reconcile nF and 碌F entries, but use an appropriate circuit analysis for acquisition, filtering and transient behavior.

Source context: .

For the acquisition-time calculation and board review, continue to ADC input settling and source impedance. Check the actual converter input model and acquisition interval rather than treating its sampled input as a fixed load resistor.

Translate the schematic into a board that can be reviewed

Keep the output node and return path clear in the schematic and layout. A small signal extracted from a larger voltage should not share an uncontrolled return drop with a high-current path. Identify where the input and reference are sensed. When accuracy matters, the relevant quantity is the voltage between those defined nodes, not a convenient point elsewhere on a broad copper region.

Leakage across a contaminated board or through protection devices can become significant relative to a high-value divider's current. Keep the sensitive node away from inappropriate nearby signals and consider the actual environmental requirements. These are circuit-specific decisions, not a universal spacing value. Electrical clearance and isolation requirements depend on the product and operating conditions; a correct divider equation is not evidence that a board is safe at a particular voltage.

The PCB DFM guide helps organize manufacturing questions, while design for assembly addresses component and process handoff. Neither replaces the electrical design review. Use the exact resistor package, approved footprint and BOM identifier. If substitutions are allowed, define the required resistance, tolerance, tracking, voltage and power characteristics rather than permitting any component with the same printed number.

From a calculation to an actionable enquiry

For an assembly enquiry, include the schematic revision, BOM and board files, and identify unresolved component alternatives. The downloaded worksheet can explain a divider's intended values and included load, but it is not a substitute for those release files. Contact does not receive the tool's inputs automatically. Attach the result manually only when it helps explain a specific engineering question.

If the circuit output differs from expectation, record the measured input, output, load and instrument conditions before requesting help. Check whether the board matches the released R1/R2 values and whether an optional load or filter was fitted. An observation such as 鈥�4 V with a 10 k惟 test load鈥� is much more useful than 鈥渢he divider is inaccurate,鈥� because it can be compared with an explicit circuit model.

For sourcing and assembly scope, continue to PCB Assembly or discuss your project. The goal is a consistent chain from circuit assumptions through component choices to a buildable release. This page gives the DC arithmetic and its boundaries; the final design still needs its receiver behavior, environment, component ratings and verification conditions to be resolved.