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Start with the mechanical envelope. Verify the coordinate datum, board outline and connector orientation against the actual mating parts. Include screw heads, washers, chassis contacts and insertion or removal paths where relevant. A connector that fits in a static three-dimensional view can still be impossible to mate after installation. Mark keepouts with their purpose so a later editor does not remove them as unused space.

Next, review footprints before positioning the whole board around them. Confirm package suffixes, pin-one location and the relationship between schematic pins and physical lands. Check exposed pads, nonplated mechanical holes and any component-specific restrictions. Library reuse is valuable only when the reused item actually matches the selected part and assembly process; a familiar footprint name is not sufficient evidence.

Agree the stackup and layer functions before critical routing. Identify which layers provide the reference for each signal group and how power reaches the loads. The multilayer PCB guide supports that construction discussion. A symmetrical-looking stackup still needs electrical and manufacturing review. Avoid committing to fine geometry while the finished copper or dielectric spacing remains unknown.

Organize placement around functional paths. Reserve positions for fixed interfaces, power entry, protection and conversion, then arrange sensitive or timing-critical circuits around their requirements. Keep noisy and sensitive functions from sharing unintended impedance where practical, while preserving intentional reference continuity. Functional separation does not automatically mean cutting the ground plane into isolated islands.

For power paths, draw both the outgoing and return routes. Identify where switched or pulsed current flows and which parts of the geometry carry it. A wide supply trace paired with a constricted return can still produce loss, heating or unwanted coupling. Include connectors, vias, thermal reliefs and narrow component escapes in the review instead of examining only the broad copper area.

Place decoupling with the full connection in mind. The relevant geometry includes the device pin, capacitor pads, vias and reference copper. A capacitor can be physically close while its return connection takes a long detour. Use the decoupling capacitor layout page for a focused loop review and a simplified transient-budget exercise. Component guidance and measurements determine whether the installed network is adequate.

Review signal-reference continuity on each routing layer. Look for plane splits, board slots, large antipads and clearances beneath the path. When a signal changes layers, identify how its return current changes reference. A nearby ground connection may help where both references are ground, but transitions between different reference nets need a deliberate design decision. Never add a bridging capacitor across an intentional isolation barrier merely to improve a signal path.

Critical routing begins with the interface specification and selected devices. Identify the nets that require impedance control, timing relationships or special topology. Route them with their reference structure and transitions visible. A differential pair still has common-mode behavior and discontinuities; keeping two traces close does not eliminate the need for a coherent reference or a proper connector transition.

Length matching should serve a timing requirement. Record what is included in the length or delay budget and whether package or connector contributions matter. Excessive tuning can add coupling and consume routing space without solving the actual timing problem. For impedance-related geometry, use the controlled-impedance worksheet with the agreed stackup, then confirm the manufacturing interpretation rather than treating a generic calculator result as a finished specification.

Review current-carrying conductors at the narrowest relevant sections. Finished width and copper thickness define the cross-section; starting foil weight alone is incomplete. Use the trace-width calculator for an explicitly limited starting estimate, then check voltage drop, local heating and the installed thermal environment. Include the return path and every transition that the simple straight-trace model omits.

Isolation requirements need their own review. Clearance through air and creepage along a surface are not interchangeable. Applicable values depend on the product, working voltage, environment and governing requirements. Keep slots, coatings and material assumptions explicit; do not reduce a spacing rule simply because the CAD tool allows a smaller value. Route questions involving product safety to the responsible engineer and the applicable standards.

Review assembly access while placement remains flexible. Consider component spacing, tooling, board support, inspection sightlines, connector orientation and rework access. A design can be electrically correct and still be difficult to populate consistently. Large parts can block access to small ones, and closely packed connectors can make inspection or repair impractical. The design-for-assembly page covers these process questions in more detail.

Define test access by the intended test strategy. Programming pads, reference grounds and important rail measurements should be accessible in the actual fixture or enclosure. Avoid placing a test pad where an installed component or retaining clip blocks it. Decide whether a measurement requires a short return connection, a specific bandwidth or a controlled loading condition. A convenient-looking pad is not automatically a useful high-frequency measurement point.

Run the approved rule set after final copper updates, zone fills and mechanical changes. Review violations and justified exceptions with their locations and reasons. Do not silence a difficult violation by weakening a global rule unless the underlying requirement has actually changed and the change is approved. Save the rule configuration with the release so another engineer can reproduce the check.

Generate manufacturing files from the frozen source and inspect them separately. Check layer identity, outline closure, drill alignment, mask openings and the intended copper population. Ensure the assembly data refers to the same variant and revision. A clean board-editor view does not prove that the exporter used the intended settings. The PCB file-format guide helps organize the receiving package.

Consider a small data-acquisition board with a converter near an external connector. The shortest signal route crosses a clearance in the reference plane, while a slightly different placement keeps the path over continuous reference copper. The team should compare the complete interface, protection and return geometry before selecting a route. This example explains the review method; it is not a measured customer result or a universal preference for one topology.

After the placement change, repeat the affected mechanical, decoupling and assembly checks. Record what changed and which previous evidence remains valid. This is more useful than rerunning an unchanged checklist and declaring every item complete. Layout review is a controlled response to the actual design, not a ceremonial final step after all decisions have become expensive to change.

provides background on signal references and layout behavior. Its examples need interpretation for the selected devices and construction. Bring unresolved fabrication constraints to the PCB DFM review with the actual stackup and design revision; a generic checklist cannot establish the limits of a specific build.